Firm:

          

Pacific Microchip Corporation

          

   

Address:

          

3916 Sepulveda Boulevard, #108, Culver City, CA 90230

          

   

Phone:

          

(310) 683-2628                                                                                                                                                                                

          

   

Name:

          

Mr. Gytis Baranauskas

          

   

E-mail:

          

contact@pacificmicrochip.com

          

   

Address:

          

3916 Sepulveda Boulevard, #108, CA 90230 - 4650

          

   

Phone:

          

(310) 683-2628                                                                                                                                                                                

          

   

Name:

          

Ieva Ivanauskas

          

   

E-mail:

          

ieva@pacificmicrochip.com

          

   

Address:

          

3916 Sepulveda Boulevard, #108, CA 90230 - 4650

          

   

Phone:

          

(310) 683-2628                                                                                                                                                                                

          

   

Estimated Technology Readiness Level (TRL) :                                                                                                                                                          
Begin: 2
End: 3

          

          

     

Technical Abstract (Limit 2000 characters, approximately 200 words):

Far-infrared and sub-mm astronomy employs MKIDs for ultimate sensitivity and resolution exceeding 10,000 pixels. Detector array readout requires RF frequency division multiplexing and complex multichannel signal processing. An FPGA based DSP used for frequency band channelizing and power level measuring in each bin suffers of suboptimum size, weight and power (SWaP).

We propose to develop an ASIC which will channelize the spectrum into 1024k frequency bins with 0.95KHz per bin. The ASIC will include two 12-bit 1GS/s ADCs, a data alignment and demultiplexing block, a poly-phase filter bank based FFT core and an accumulation/readout block including a high-speed 16Gbps ESI Stream interface. Additionally, the ASIC will include a PLL for clock synthesis, a debug memory for storing of short duration raw digitized data or the debug data for the FFT core. A digital control subsystem will handle the entire ASIC’s operation and communication. In addition to minimized SWaP, the ASIC will tolerate TID and SEE, and will operate below standard -40C temperature.

Within Phase I we will provide the proof of feasibility of implementing the proposed ASIC. Phase II will result in the silicon proven ASIC prototypes.

          

          

     

Potential NASA Applications (Limit 1500 characters, approximately 150 words):

• Single photon sensitive focal planes from IR to X-ray
• For Earth, balloon and space based telescopes and radiometers
• Mission examples: JPSS-2, 3, 4,  PACE and TROPICS
• Spectrometer systems for remote sensing

          

          

     

Potential Non-NASA Applications (Limit 1500 characters, approximately 150 words):

• MKID based single photon sensitive imaging for remote sensing and surveillance
• Specialized spectrometers for temperature, vapor, pollutants exploration
• Generic spectrometers and spectrum analyzers
• Infrared, visible light, UV and THz imaging in surveillance and security systems

          

          

     

Duration:     6