Firm:

          

Pacific Microchip Corporation

          

   

Address:

          

3916 Sepulveda Boulevard, #108, Culver City, CA 90230

          

   

Phone:

          

(310) 683-2628                                                                                                                                                                                

          

   

Name:

          

Dr. Reza Ramezani

          

   

E-mail:

          

reza@pacificmicrochip.com

          

   

Address:

          

3916 Sepulveda Boulevard, #108, CA 90230 - 4650

          

   

Phone:

          

(310) 683-2628                                                                                                                                                                                

          

   

Name:

          

Ieva Ivanauskas

          

   

E-mail:

          

ieva@pacificmicrochip.com

          

   

Address:

          

3916 Sepulveda Boulevard, #108, CA 90230 - 4650

          

   

Phone:

          

(310) 683-2628                                                                                                                                                                                

          

   

Estimated Technology Readiness Level (TRL) :                                                                                                                                                          
Begin: 2
End: 3

          

          

     

Technical Abstract (Limit 2000 characters, approximately 200 words):

Pacific Microchip Corp. proposes to design a 28GHz spectrometer ASIC which performs channelizing the signal's spectrum. The ASIC includes an 8-bit 56GS/s time-interleaved ADC coupled with a digital backend performing digital poly-phase filter function and parallelized Fast Fourier Transform (FFT). To achieve 28GHz signal bandwidth, we will apply a time-interleaved temporal ADC architecture with advanced minimization of the time-interleaving related parameter mismatches in subADCs. This is expected to result in significant reduction of unwanted artifacts in the output spectrum. The feasibility of implementation of the ADC based on a charge ramping quantizer was already proven within another SBIR project. Instead of overdesigning, when seeking to maximize the performance, the ADC will rely on comprehensive calibration of ADC parameters. On-chip phase locked loops (PLLs) will be used for clock synthesis. For convenient interfacing with field programmable gate arrays (FPGAs), the ASIC will include a high-speed JESD204B standard data interface. Phase I work will provide the proof of ASIC feasibility – critical blocks will be implemented and verified at targeted technology node. In Phase II, a silicon proven spectrometer ASIC will be fabricated and tested.

          

          

     

Potential NASA Applications (Limit 1500 characters, approximately 150 words):

Spectrometer instruments based on the proposed ASIC are required for current and future space borne and airborne NASA’s passive remote sensing missions for exploration of cosmic microwave background, Earth’s surface and atmosphere. Specific missions include: A-SLMS, CAMEO, GACM, GeoSTAR, HyspIRI and GEO-CAPE. In addition, the proposed ASIC can find application in space and Earth based radio telescopes used for astronomy.

          

          

     

Potential Non-NASA Applications (Limit 1500 characters, approximately 150 words):

Spectrometers employed on satellites, aircraft and air balloons are required for remote sensing and surveillance. Environmental research requires spectrometers for space, airborne and ground based remote sensing instruments for temperature, water vapor, pollutant and ozone exploration. Thermal imaging in security systems is yet another area for application of the proposed ASIC.

          

          

     

Duration:     6