The team of Indiana Integrated Circuits, LLC (IIC), and Calumet Electronics Corporation (CEC) propose the development and demonstration of an innovative approach for modularized, highly-scalable, high-performance printed circuit board (PCB) assemblies. By extending the chip-to-chip edge-interconnect technology known as “Quilt Packaging” from microchips to PCBs, multiple “boardlets” can be assembled into a mechanically robust PCB system comprised of disparate process technologies and substrate materials. Such an approach can be applied to optimize PCB systems for yield, cost, security, manufacturability, and highly customizable rapid manufacturing for a wide variety of NASA, defense, and commercial applications. Quilt Packaging® (QP), is implemented using solid metal interconnection which protrude from the vertical side of a chip, allowing for virtually seamless edge-to-edge connection which is extremely low-loss and extremely wide bandwidth. Preliminary work by IIC has shown potential for similar edge-to-edge implementation between PCBs, eliminating or dramatically reducing the need for typical sockets, wiring and cabling while simultaneously improving electrical performance
IIC’s PCB QP providing a reliable, scalable, modular approach to very dense I/O PCB interconnections.. By partitioning a traditional PCB system into boardlets and then “quilting” them back to together, one can optimize for manufacturing yields as well as mix-and-match disparate substrate materials for cost reductions and design re-use. Applications such as command and control electronics, sensing, communications, and power management and distribution can be positively impacted by miniaturizing and ruggedizing the PCB-to-PCB interfaces.
Beyond NASA and military/aerospace applications, the PCB boardlet approach can be applied to many commercial systems. These include automotive, big data, biomedical, and power/energy management, among others. The key benefits from using this technology include increased speed and power carrying capability per a given substrate size.