NASA SBIR 2020-I Solicitation

Proposal Summary


PROPOSAL NUMBER:
 20-1- S4.04-5263
SUBTOPIC TITLE:
 Extreme Environments Technology
PROPOSAL TITLE:
 High Fidelity Analog Integration Techniques for Venus Surface Data Acquisition
SMALL BUSINESS CONCERN (Firm Name, Mail Address, City/State/Zip, Phone)
Ozark Integrated Circuits, Inc.
700 West Research Center Boulevard
Fayetteville, AR 72701
(479) 935-1600

Principal Investigator (Name, E-mail, Mail Address, City/State/Zip, Phone)

Name:
Mr. Nicholas Chiolino
E-mail:
nchiolino@ozarkic.com
Address:
700 West Research Center Boulevard Fayetteville, AR 72701 - 7175
Phone:
(479) 935-1600

Business Official (Name, E-mail, Mail Address, City/State/Zip, Phone)

Name:
Anthony Francis
E-mail:
francis@ozarkic.com
Address:
700 West Research Center Boulevard Fayetteville, AR 72701 - 7175
Phone:
(479) 575-1600
Estimated Technology Readiness Level (TRL) :
Begin: 3
End: 5
Technical Abstract (Limit 2000 characters, approximately 200 words)

NASA has demonstrated a resolve to land instruments on the corrosive, high-pressure (~100 bar), high-temperature (470°C) surface of Venus. NASA Glenn Research Center’s JFET-R technology is the only one that has shown 1000’s of hours operation under Venus surface conditions. Due to the extreme environment found on the surface of Venus, access to reliable passive components such as resistors and capacitors to accompany JFET-R chipsets are minimal to not available. Furthermore, this has restricted design exploration into mixed signal application specific integrated circuits (ASICs) due to there dependency on off chip passive components. Ozark IC has identified additive manufacturing capabilities that would enable custom tunable resistors to accompany JFET-R analog to digital converters.

The objective for this proposal is an all JFET-R based analog to digital converter with supporting passive components in a single integrated package.

The project will utilize additive manufacturing techniques to create high-temperature single layer printed resistors in several different conductors. Furthermore, high-temperatures capacitors will be integrated onto the same substrate as the printed resistors. This, in combination with NASA’s JFET-R technology will create a design technology which will be used to develop a analog to digital sensor node. These advancements in passive component integration should allow a library of mixed signal designs to be utilized. Once resistor materials have been selected, resistor test structures will be printed in all pastes. These designs will be evaluated at probe to 400˚C as well as long term reliability testing at 500˚C.

Potential NASA Applications (Limit 1500 characters, approximately 150 words)

The proposed passive printing and JFET-R analog to digital integration technology is the next logical development step for NASA’s JFET-R process towards enabling sensor nodes on the corrosive, high-pressure (~100 bar), high-temperature (up to 500˚C) Venus surface. The system will also be useful to other high temperature environments, such as Mercury, as well as high temperature avionics, re-entry, and propulsion sensing and controls.

Potential Non-NASA Applications (Limit 1500 characters, approximately 150 words)

Any application that needs a very high temperature system integration, such as high temperature data processing, actuation, or is a potential market. Examples include: geothermal resource exploration to improve drilling efficiency, jet engine sensing and actuation for distributed engine controls, and avionics for high temperature sensing and actuation in hypersonic aircraft.

Duration: 6

Form Generated on 06/29/2020 21:08:39