NASA SBIR 2019-I Solicitation

Proposal Summary


PROPOSAL NUMBER:
 19-1- S3.08-3447
SUBTOPIC TITLE:
 Command, Data Handling, and Electronics
PROPOSAL TITLE:
 Processor Redundancy Enabled Software Event Recovery with Voting (PRESERV)
SMALL BUSINESS CONCERN (Firm Name, Mail Address, City/State/Zip, Phone)
Emergent Space Technologies, LLC
7901 Sandy Spring Road, Suite 511
Laurel, MD 20707- 3589
(301) 345-1535

Principal Investigator (Name, E-mail, Mail Address, City/State/Zip, Phone)

Name:
Mr. Austin Probe
E-mail:
austin.probe@emergentspace.com
Address:
7901 Sandy Spring Road, Suite 511 Laurel, MD 20707
Phone:
(301) 345-1535

Business Official (Name, E-mail, Mail Address, City/State/Zip, Phone)

Name:
Mr. Everett Cary Jr.
E-mail:
everett.cary@emergentspace.com
Address:
7901 Sandy Spring Road, Suite 511 Laurel, MD 20707 - 3589
Phone:
(301) 345-1535
Estimated Technology Readiness Level (TRL) :
Begin: 2
End: 4
Technical Abstract (Limit 2000 characters, approximately 200 words)

New processor architectures, such as ARM and RISC-V have greatly improved SWAP-C for the computational power that they provide, especially when compared to the systems that are currently relied on for spacecraft requiring robust computer hardware. ARM has seen wide adoption in the consumer space due to its low cost and efficiency and RISC-V has the potential to enable the introduction of custom chip designs at a much smaller scale than what is currently possible, thus opening the door to the potential usage of specialized custom silicon for use on space missions. The low cost and high efficiency of these processors makes redundant architectures feasible. Using the NASA Core Flight System (cFS),  we develop a voting framework and couple it with a flight computer architecture that leverages redundant ARM commercial-off-the-shelf (COTS) systems on a chip (SOCs) or a custom redundant RISC-V processor to create the Processor Redundancy Enabled Software Event Recovery with Voting (PRESERV). As the interest in small spacecraft missions grows, including missions beyond earth orbit, there is a need for robust and capable computer platforms for these vehicles.  PRESERV meets these needs by combining the advantages of modern processor architectures and fault tolerance to give NASA new mission capabilities and provide a significant increase in robustness for low-cost spacecraft.

Potential NASA Applications (Limit 1500 characters, approximately 150 words)

PRESERV will provide a robust low cost flight computer platform. Such a system would be relevant to most if not all NASA missions. Even missions that have access to rad-tolerant processors like the HPSC for their main flight computer could use PRESERV as a payload processor. Integration with cFS will leverage a TRL 9 software framework that has been proven to enable rapid deployment of high quality flight software and enables access to the existing library of cFS applications.

Potential Non-NASA Applications (Limit 1500 characters, approximately 150 words)

Computer hardware that is robust to SEE or other failures with low SWAP-C is relevant in many military and commercial applications. PRESERV will fill a niche for DoD space missions and for robotics/UAS in combat environment where there is are requirements for significant computing resources on a robust platform, but cost is a concern.

Duration: 6

Form Generated on 06/16/2019 23:29:10