NASA SBIR 2019-I Solicitation

Proposal Summary

 19-1- S1.04-4100
 Sensor and Detector Technologies for Visible, IR, Far-IR, and Submillimeter
 Computational Pixel Imager (CPI) Readout Integrated Circuits for Next Generation High Performance and Low SWaP Sensors
SMALL BUSINESS CONCERN (Firm Name, Mail Address, City/State/Zip, Phone)
Copious Imaging, LLC
83 Hartwell Avenue, Suite 150
Lexington, MA 02421- 3116
(978) 457-4539

Principal Investigator (Name, E-mail, Mail Address, City/State/Zip, Phone)

Dr. Michael Kelly
83 Hartwell Ave, Suite 150 Lexington, MA 02421 - 3116
(978) 968-6408

Business Official (Name, E-mail, Mail Address, City/State/Zip, Phone)

Justin Baker
83 Hartwell Ave, Suite 150 Lexington, MA 02421 - 3116
(978) 457-4539
Estimated Technology Readiness Level (TRL) :
Begin: 2
End: 3
Technical Abstract (Limit 2000 characters, approximately 200 words)

We propose to leverage on-going CPI work to enable a low-cost and low-risk program approach that can be executed as a Phase I SBIR program.  The scope of this phase I effort is limited to studying the feasibility of some fundamental parameters of a design targeting HOT MWIR and high data-rate FTIR applications.   The following technical aspects of a NASA CPI design will be explored: 

  • Model the basic CPI ROIC specifications needed to support NASA earth science and inter-planetary missions.  For HOT IR missions, survey thermo-electric cooler availability and performance as well as the needed LSB size to support shot-noise limited performance.  This will help form the power budget for the device.  For FTIR missions, explore availability of “2-color” detector arrays and Avalanche Photodiodes (APD) for meeting stated requirements.  Evaluate the potential for meeting requirements with or without APD detector arrays. 

  • Methods for reducing the quantization noise floor, which defines the performance associated with the least significant bit (LSB) of the digitized data. Past designs typically achieve approximately 2000e- as the minimum LSB size.  Experimental designs have achieved as low as 1e- LSB size, but with noise and linearity issues present.  The goal of this effort will be to explore new designs and feasibility to achieve between 30 – 500e- LSB size with a low power and high performance front-end design.   

  • Design trades to determine what counter bit depth can be accomplished as a function of pixel size to achieve global shuttering, read-while integrate, orthogonal transfer, and “2-color” detector operation.  Several process nodes will be considered at Fabs found both on- and off-shore.  ITAR or EAR restrictions may limit the choice of Fabs in the long run, however this limitation will not be a consideration in this study. 

Potential NASA Applications (Limit 1500 characters, approximately 150 words)

CPI technology will broadly enable future NASA missions to support new modes of operation, achieve unprecedented performance, and enable multi-mode operation.  Smaller satellites for Earth Science and Interplanetary missions are possible by reducing the need for supporting electronics to process data, reduce the amount of data to be communicated to the ground, enabling resolution and coverage area that cannot be achieved with existing imagers, and remove constraints that are currently imposed on sensor developers by limitations of the imager.

Potential Non-NASA Applications (Limit 1500 characters, approximately 150 words)

While the developed NASA CPI ROIC will be useful for scientific, R&D, space, and DoD applications, it is unlikely that it will have broad appeal in commercial markets.  To have wider commercial applicability to autonomous systems, robotics, mobile, etc. markets, device scaling to smaller pixels and larger arrays is needed.  Future, follow-on research will attempt to scale to commercial markets.

Duration: 6

Form Generated on 06/16/2019 23:38:35