NASA SBIR 2017 Solicitation


PROPOSAL NUMBER: 171 S3.08-9948
SUBTOPIC TITLE: Command, Data Handling, and Electronics
PROPOSAL TITLE: Rad-hard Embedded Processing SIP

SMALL BUSINESS CONCERN (Firm Name, Mail Address, City/State/Zip, Phone)
Silicon Space Technology Corporation
1501 S. MoPac Expressway, Suite 350
Austin, TX 78746 - 7673
(512) 550-2954

PRINCIPAL INVESTIGATOR/PROJECT MANAGER (Name, E-mail, Mail Address, City/State/Zip, Phone)
Ross Bannatyne
2028 East Ben White Boulevard, Suite 220
Austin, TX 78741 - 6966
(512) 550-2954

CORPORATE/BUSINESS OFFICIAL (Name, E-mail, Mail Address, City/State/Zip, Phone)
Garry Nash
1501 S. MoPac Expressway, Suite 350
Austin, TX 78746 - 7673
(651) 559-1550

Estimated Technology Readiness Level (TRL) at beginning and end of contract:
Begin: 4
End: 5

Technology Available (TAV) Subtopics
Command, Data Handling, and Electronics is a Technology Available (TAV) subtopic that includes NASA Intellectual Property (IP). Do you plan to use the NASA IP under the award?

TECHNICAL ABSTRACT (Limit 2000 characters, approximately 200 words)
VORAGO Technologies will create a design for a radiation-hardened miniaturized System-In-Package (SIP) that will comprise of an ARM-Cortex based microcontroller, an MRAM memory chip and an Analog-to-digital converter. The significance of the innovation is to enable a highly integrated SIP assembly that integrates multiple die from different processes and foundries, enabling a miniaturized, highly-reliable embedded processing / sensor interface module. The SIP will be optimized for size, weight, power consumption and radiation hardness. Based upon preliminary calculations, we expect that the SIP will be a minimum of 5X the area of implementing discrete chips. Combining multiple functions together will significantly reduce the mass and volume compared to existing solutions that would require at least three separate ICs to provide the same level of functionality. Designers will be able to reduce their PCB size and the amount of effort that it takes to layout and route a board. Fewer PCB connections and solder joints will improve the reliability of a design. A single SIP can also be tested and qualified more expediently than three individual devices. The technical objectives for the SIP are to select best-in-class radiation hardened semiconductor devices that offer a high level of performance, interoperability, very low power consumption and produce a design to integrate them into a single package. The resulting package footprint will be the smallest possible but will be designed so that it can be tested and qualified to MIL-PRF-38534. There are two package configurations that are possible to implement. One option does not involve die stacking and will reduce the area (versus using three standalone chips) of 5.03X. Another option uses a stacked die configuration and will result in an area reduction of 7.37X. After analyzing out both options in more detail, we will decide which option to pursue. A test and qualification plan will be provided.

POTENTIAL NASA COMMERCIAL APPLICATIONS (Limit 1500 characters, approximately 150 words)
This board will be a suitable platform solution for many NASA space-based observatories, fly-by spacecraft, orbiters, landers and robotic / sample return missions that require robust command and control capabilities. This miniaturized SIP will be an ideal companion chip to locate with sensors (either analog or digital output types) to perform signal conditioning close to the sensing element. This is advantageous as signals are cleaner at the source without the electrical noise pollution that long signal paths introduce. The device is based upon a programmable microcontroller that is therefore flexible for many highly reliable embedded processing or sensor readout application. When software is programmed into the device, it becomes a custom solution. Programming the device and supporting software will be straightforward as it based on an existing ARM Cortex architecture.

POTENTIAL NON-NASA COMMERCIAL APPLICATIONS (Limit 1500 characters, approximately 150 words)
There is a demand for a highly integrated SIP like this in commercial space applications, particularly satellites. The benefit of this part over closest fit existing solutions is that there are no state-of-the-art (based on ARM Cortex) "mid-range" embedded processors that are available in a small footprint with NVM and a precision analog-to-digital convertor. Commercial space system developers that would have an interest in this SIP would include SpaceX, Tyvak, SSTL, SSL, Spire, Pumpkin, Planet Labs, Planetary Resources, GomSpace, Clyde Space, Innovative Solutions in Space, Boeing, Astranis and Raytheon.

TECHNOLOGY TAXONOMY MAPPING (NASA's technology taxonomy has been developed by the SBIR-STTR program to disseminate awareness of proposed and awarded R/R&D in the agency. It is a listing of over 100 technologies, sorted into broad categories, of interest to NASA.)
Algorithms/Control Software & Systems (see also Autonomous Systems)
Autonomous Control (see also Control & Monitoring)
Avionics (see also Control and Monitoring)
Circuits (including ICs; for specific applications, see e.g., Communications, Networking & Signal Transport; Control & Monitoring, Sensors)
Command & Control
Condition Monitoring (see also Sensors)
Process Monitoring & Control
Robotics (see also Control & Monitoring; Sensors)
Sensor Nodes & Webs (see also Communications, Networking & Signal Transport)
Spacecraft Instrumentation & Astrionics (see also Communications; Control & Monitoring; Information Systems)

Form Generated on 04-19-17 12:59